Your tasks:

• Participation in the definition of our system-on-chip architecture
• Responsibility for the RTL design of the digital blocks and their integration at system level
• Development and verification of our wireless system-on-chip solution
• Support and implementation of functional verification at chip and block level
• Support with product qualification, testing and ramp-up
• Documentation during development
• Working in an international team (good English skills are required)

Your profile:

• Bachelor's degree in electrical engineering/electronics or comparable
• Good knowledge of ASIC/FPGA SoC architecture, digital design and verification
• Programming languages: SystemVerilog, Verilog, VHDL
• Experience in the development of verification methods and infrastructures for automated testbenches
• Advantageous:
  • Experience in synthesis for various target technologies

We offer:

• Permanent position with a high level of personal responsibility and very good development opportunities
• Work in an international, friendly and motivated team that will be happy to support you with any questions you may have
• Flat hierarchies, openness to change and appreciation of your ideas
• An appreciative corporate culture characterized by a high degree of team spirit and trust, regular team events
• Flexible working hours (flexitime) with 1 regular home office day per week, further opportunities for mobile working by arrangement
• Attractive benefits: free job or Germany ticket or job bike (monthly flat rate of €55) + free use of the gym in the building
• Bright and comfortable offices in a central Dresden location (Plauen)
• Fast and uncomplicated application process