Digital Design Synthesis and Physical Implementation Engineer (m/f/x)

We are looking for an experienced professional in synthesis and physical implementation to join our digital design team and work with us on the development of state-of-the-art FD-SOI-based systems. In this role, you will develop and improve the digital implementation flow—from RTL through synthesis and physical implementation to physical realization and tape-out preparation.

If you enjoy analytically solving complex design and timing challenges, working at the intersection of RTL, SoC architecture, verification, analog/RF, mixed-signal, and layout, and want to build sustainable workflows and automation, you’ve come to the right place.

Your Responsibilities:

• Developing and maintaining the digital implementation flow from RTL through synthesis and physical implementation to physical realization.
• Performing and analyzing logic synthesis, including constraint setup, technology mapping, and netlist generation.
• Creating, maintaining, and optimizing timing, clock, input/output, and design constraints.
• Supporting floorplanning, placement, clock-tree synthesis, routing, and design optimization.
• Analyzing and improving timing, area, power, and congestion results.
• Identifying and resolving implementation issues in close collaboration with the RTL, SoC architecture, design verification, and physical design teams.
• Support for static timing analyses, signal integrity analyses, and other relevant implementation checks.
• Preparing and documenting handover data for physical verification, sign-off, and manufacturing-related activities.
• Coordinating implementation requirements and interfaces with the Analog/RF, Mixed-Signal, and Layout teams.
• Support for design rule checks, layout-versus-schematic checks, and other physical sign-off activities, as required by the respective project.
• Developing and maintaining scripts and automations for synthesis, implementation, analysis, and regression flows.
• Documentation of flow configurations, assumptions, constraints, results, open issues, and implementation risks.
• Support for pre-tape-out readiness reviews and the preparation of implementation deliverables.
• Building and further developing expertise, processes, and tooling related to synthesis and physical implementation.
• Continuous improvement of implementation flows, reusable scripts, reporting structures, and handover processes.

Your Profile:

• A bachelor’s or master’s degree in electrical engineering, microelectronics, computer engineering, computer science, or a comparable qualification.
• Senior-level, independent professional experience in ASIC backend, synthesis, physical implementation, digital backend, or a closely related semiconductor design field; as a guideline, you have at least seven years of relevant experience.
• Practical experience with ASIC synthesis and physical implementation, as well as a solid understanding of the RTL-to-gate and RTL-to-layout flows.
• Strong knowledge of synthesis, timing constraints, static timing analysis, and design optimization.
• A solid understanding of clocking, reset behavior, timing paths, setup and hold requirements, and timing closure.
• Experience with scripting for design automation and analysis, for example, using Tcl, Python, Perl, or similar languages.
• You can analyze implementation reports in a structured manner and identify issues related to timing, area, power, congestion, and constraints.
• Experience with floorplanning, placement, clock-tree synthesis, routing, extraction, and physical sign-off.
• Experience with leading EDA tools from Synopsys, Cadence, Siemens EDA, or comparable tool environments.
• A structured, analytical, and solution-oriented approach to work, as well as a high degree of personal responsibility.
• Very good English skills at a minimum B2 level; knowledge of German is a plus.
• Nice-to-have:
  • Experience with advanced timing constraints, clock-domain crossings, multi-cycle paths, and false-path definitions.
  • Knowledge of low-power design, power intent, UPF, multi-voltage domains, or power analysis.
  • Experience with DRC, LVS, antenna checks, design rule debugging, or other physical verification activities.
  • Experience with mixed-signal SoCs as well as the implementation requirements for analog/RF interfaces and hard macros.
  • Experience with ASIC tape-out, foundry handover, PDKs, technology libraries, or silicon bring-up.
  • Experience with FPGA implementation or prototyping.
  • Experience with automated regression testing, CI environments, version control, and reproducible implementation flows.
  • Knowledge of DFT, scan insertion, ATPG, test constraints, or manufacturing test requirements.
  • Experience in establishing or improving synthesis and physical implementation processes in a startup or scale-up environment.

We offer:

Creative freedom & responsibility

• Ample creative freedom and genuine ownership instead of micromanagement
• Short decision-making paths and direct influence on strategic decisions
• A visible contribution to the success of our product and company
• The opportunity to play a key role in a growing deep-tech company
• Contributing to a technology that can transform the future of wireless communication

Benefits

• Employer contribution toward the Deutschlandticket or DVB-Jobticket in the amount of €55.10 per month
• Alternatively, an employer contribution toward the JobRad of €54.90 per month
• Unlimited free gym access right in the building
• Retirement plan and disability insurance with employer contributions ranging from €100 to €200 per month

Flexibility & Work Environment

• Flexible work hours with core hours from 10:00 a.m. to 3:00 p.m.
• Hybrid work with a high degree of flexibility
• Modern hardware and professional work equipment
• Bright, modern office spaces in a central location in Dresden
• Ergonomically designed workstations

Team & Culture

• An international team with flat hierarchies and short lines of communication
• Direct interaction with management and technical decision-makers
• Colleagues who support one another and share knowledge
• Lunch breaks together and regular team events
• A corporate culture in which initiative and new ideas are actively encouraged